1. Technical Field
The present invention relates generally to an improved data processing system and method. More specifically, the present invention is directed to a system and method for communicating instructions and data between a processor and external devices.
2. Description of Related Art
Normally, in the prior art, when a CPU or other processing unit (PU) is waiting upon some event external to the program, the operating system or an active program will run a poll loop where it will keep reading an event register, utilized by the PU in connection with the program, until the event that it is waiting upon occurs. While the program is operating, the PU is polling the event register and is not doing useful work.
Typical modern processors often use virtual memory and the memory mapping of external devices for this communication. On the other hand, some processors, especially in a multiprocessor environment, only have access to local memory and not to virtual memory. Local memory is finite and, in typical multiprocessor configurations, no memory outside of this local memory can be accessed by load and store operations. Thus, the use of local memory for other PU functions is limited while awaiting response from an external device. If a PU is simultaneously awaiting communication responses from several devices, the available memory for other functions is even further limited.
Memory may also be used to keep track of whether or not there is valid data in an incoming or outgoing register. Valid data is data that has been placed in the register for use by a receiving device but has not yet been accessed by the receiving device. Thus, from the above, it is clear that there are many drains on the memory resource in most modern computing devices.